There has been some discussion on various forums, and the comments sections of a number of Ham Blogs and on-air QSOs, concerning the Phase Noise of the Si5351 chip being offered in the form of breakout boards.
I recently commented on a post that Bill Meara, N2CQR, put on his SolderSmoke Daily News Blog. I was thinking about both sides of the argument and since I had an SA with a Phase Noise personality, I figured I’d do the measurements.
Not a bad raw view at a RBW of 300 Hz. The baseline is at -80 dBm with phase noise seen near the carrier at -60 dBm.
Next is the Phase Noise measurement trace. As you can see, the average SSB phase noise came out to -96.95 dBc/Hz.
Lastly, and probably more telling, was the THD measurement of the carrier and 9 harmonics.
As can be seen above, the notable issue is the THD being 40.67%. However, any low-pass function prior to mixing stages will adequately block most of this harmonic content above 14 Mhz and is a frequent feature of modern superheterodyne architectures.
So while the Phase Noise measurement was not bad at all, the real concern when using what was intended to be a multi-clock generator chip for use in digital systems, is to get the THD down coming into a mixer stage (and after of course) so that the result is closer to a more pure sine wave.